You are required to read and agree to the below before accessing a full-text version of an article in the IDE article repository.

The full-text document you are about to access is subject to national and international copyright laws. In most cases (but not necessarily all) the consequence is that personal use is allowed given that the copyright owner is duly acknowledged and respected. All other use (typically) require an explicit permission (often in writing) by the copyright owner.

For the reports in this repository we specifically note that

  • the use of articles under IEEE copyright is governed by the IEEE copyright policy (available at http://www.ieee.org/web/publications/rights/copyrightpolicy.html)
  • the use of articles under ACM copyright is governed by the ACM copyright policy (available at http://www.acm.org/pubs/copyright_policy/)
  • technical reports and other articles issued by M‰lardalen University is free for personal use. For other use, the explicit consent of the authors is required
  • in other cases, please contact the copyright owner for detailed information

By accepting I agree to acknowledge and respect the rights of the copyright owner of the document I am about to access.

If you are in doubt, feel free to contact webmaster@ide.mdh.se

Successful Prototyping of a Real-Time Hardware Based Terrain Navigation Correlator Algorithm

Authors:

Andreas Löfgren, Filip Traugott , Kim Andersson , Lennart Lindh

Publication Type:

Conference/Workshop Paper

Venue:

Euromicro symposium on Digital System Design

Publisher:

IEEE


Abstract

One of the main problems for underwater terrain navigation using the correlation method is the significant computing time due to the large amount of calculations. When the algorithm is used on a regular PC the processing time is far too long for real time applications. The Swedish navy is interested in a none-revealing terrain navigation system that can perform in real time. The article describes an implementation of a navigation system into a hardware accelerator (in one FPGA supported by two SDRAMs). The use of a FPGA gives parallelism and will shorten the computing time considerable. The actual computing time has been decreased with over 100 times compared with similar PC applications. The implementation is programmed into a Virtexâ-II Xilinx device and has been written in VHDL. A SDRAM controller IP-block was designed and implemented in the FPGA. Also a custom made prototype PCB board was developed in the project.

Bibtex

@inproceedings{Lofgren539,
author = {Andreas L{\"o}fgren and Filip Traugott and Kim Andersson and Lennart Lindh},
title = {Successful Prototyping of a Real-Time Hardware Based Terrain Navigation Correlator Algorithm},
month = {September},
year = {2004},
booktitle = {Euromicro symposium on Digital System Design},
publisher = {IEEE},
url = {http://www.es.mdu.se/publications/539-}
}