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FP-SLIC: A Fully-Pipelined FPGA Implementation of Superpixel Image Segmentation


Publication Type:

Conference/Workshop Paper


25th Euromicro Conference on Digital System Design (DSD)




A superpixel segment is a group of pixels that carry similar information. The Simple Linear Iterative Clustering (SLIC) is a well-known algorithm for generating superpixels that offers a good balance between accuracy and efficiency. Nevertheless, due to its high computational requirements, the algorithm does not meet the demands of real-time embedded applications in terms of speed and resources. This paper proposes a fully-pipelined FPGA architecture based on SLIC, dubbed FP-SLIC, that exhibits 1) a simplified and efficient algorithm of reduced computational complexity that facilitates algorithm development for FPGAs, 2) a fully pipelined FPGA design operating at 40MHz with a throughput of one pixel per cycle, and 3) a memory-efficient architecture that eliminates the requirement for external memory. FP-SLIC shows promising BSDS500 benchmark results, especially considering boundary recall for less than 1000 superpixels, where it performs better than related works, while, at the same time, accomplishing a throughput of 259 frames per second (fps).


author = {Adnan Ghaderi and Carl Ahlberg and Fredrik Ekstrand and Mikael Ekstr{\"o}m},
title = {FP-SLIC: A Fully-Pipelined FPGA Implementation of Superpixel Image Segmentation},
month = {January},
year = {2023},
booktitle = {25th Euromicro Conference on Digital System Design (DSD) },
url = {}