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Automatic Generation of Timing Models for Timing Analysis of High-Level Code
Publication Type:
Conference/Workshop Paper
Venue:
Proc. 19th International Conference on Real-Time and Network Systems (RTNS2011)
Publisher:
The IRCCyN lab.
Abstract
Traditional timing analysis is applied only in the late stages of embedded
system software development, when the hardware is available and the code is
compiled and linked. However, preliminary timing estimates are often needed
already in early stages of system development, both for hard and soft
real-time systems. If the hardware is not yet fully accessible, or the code
is not yet ready to compile or link, then the timing estimation must be done
for the source code rather than for the binary. This paper describes how
source-level timing models can be derived automatically for given
combinations of hardware architecture and compiler. The models are
identified from measured execution times for a set of synthetic "training
programs" compiled for the hardware platform in question. The models can be
used to derive source-level WCET estimates, as well as for estimating the
execution times for single program runs. Our experiments indicate that the
models can predict the execution times of the final, compiled code with a
deviation up to 20%.
Bibtex
@inproceedings{Altenbernd2134,
author = {Peter Altenbernd and Andreas Ermedahl and Bj{\"o}rn Lisper and Jan Gustafsson},
title = {Automatic Generation of Timing Models for Timing Analysis of High-Level Code},
editor = {S{\'e}bastien Faucou},
month = {September},
year = {2011},
booktitle = {Proc. 19th International Conference on Real-Time and Network Systems (RTNS2011)},
publisher = {The IRCCyN lab.},
url = {http://www.es.mdu.se/publications/2134-}
}