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A Hardware and Software Monitor for High-Level System-on-Chip Verification
Publication Type:
Conference/Workshop Paper
Venue:
Proceedings of the IEEE International Symposium on Quality Electronic Design
Abstract
Verification of todays Systems-on-Chip (SoC) occur at low
abstraction-levels, typically at register-transfer level (RTL). As the
complexity of SoC designs grows, it is increasingly important to move
verification to higher abstraction-levels. Hardware/software
co-simulation is a step in this direction, but is not sufficient due
to inaccurate processor models, and slow hardware simulation
speeds. System-level monitoring, commonly used for event-based
software debugging, provides information about task scheduling events,
inter-task communication and synchronisation, semaphores/resources,
I/O interrupts, etc. We present MAMon (Multipurpose/Multiprocessor
Application Monitor), a monitoring system that can both monitor the
logic-level and the system-level in single/multiprocessor SoCs. A
small hardware probe-unit is integrated in the SoC design and connects
via a parallel-port link to a host-based monitoring tool
environment. The probe-unit collects all events in the target system
in run-time, and timestamps them with a resolution of 1 us. The
events are then stored in a database on the host for further
processing. The paper will describe MAMon and how it works for
software and hardware monitoring. The paper also describe how
system-level monitoring can be achieved non-instrusively by using a
hardware-based Real-Time Kernel.
Bibtex
@inproceedings{El Shobaki221,
author = {Mohammed El Shobaki and Lennart Lindh},
title = {A Hardware and Software Monitor for High-Level System-on-Chip Verification},
month = {March},
year = {2001},
booktitle = {Proceedings of the IEEE International Symposium on Quality Electronic Design},
publisher = {IEEE},
url = {http://www.es.mdu.se/publications/221-}
}