FASTER AI addresses emergent needs to embed machine learning (ML) inference capabilities within hardware infrastructure of critical importance and use. We focus on hardware utilized widely in telecommunications as well as airborne systems and other vehicles. Current ML workflow programming tools are controlled primarily by dominant cloud vendors and overlook non-commodity use, focusing solely on standard AI accelerators. However, as ML inference takes over traditional heuristic- and control-based decision-making in the industry there are major needs to re-purpose that hardware towards the use of ML. Driven by use cases of safety- and time-critical functions, we streamline our ML integration pipeline around three core activities: 1) finding a suitable neural architecture, compressed-enough to fit the constraints of special hardware, 2) achieving multi-stage cross-compilation of critical logic and ML functions and, 3) equipping critical hardware with proper runtime support in order to actuate to data-application demands without sacrificing safety and service time guarantees. Our methodology is effective for current hardware but also future-proof for upcoming architectures or releases of special accelerators used in critical decision-making industries. We strongly believe that the FASTER AI approach is the most sustainable way forward toward digitalizing and creating value out of our existing critical infrastructures while also maintaining a relevant outlook for the future.
|First Name||Last Name||Title|
|Farnam||Khalili Maybodi||Research Engineer/Technician|
NeuroPIM: Flexible Neural Accelerator for Processing-in-Memory Architectures (May 2023) Ali Monavari , Sepideh Fattahi , Mehdi Modarressi , Masoud Daneshtalab International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors (May 2023) Mahdi Taheri , Mohammad Ahmadilivani , Maksim Jenihhin , Masoud Daneshtalab, Jaan Raik International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
DeepVigor: Vulnerability Value Ranges and Factors for DNNs' Reliability Assessment Mohammad Ahmadilivani , Mahdi Taheri , Jaan Raik , Masoud Daneshtalab, Maksim Jenihhin European Test Symposium 2023 (IEEE ETS)
|KTH Royal Institute of Technology||Academic|
|RISE Research Institutes of Sweden||Academic|