Francisco Pozo (not working at IDT anymore)

I'm a Ph.D. Student in the Formal Modelling and Analysis of Embedded Systems Group. I'm currently involved in the RetNet project that aims to advance the state of the art and practice in predictable real-time and Internet networking. I obtained the title of Computer Science (Msc) by the University of Illes Balears, Spain, in 2014. Currently, I am pursuing my Computer Science PhD at Mälardalen University.


I started in the world of research quantifying the reliability of a system with replicated buses based on CAN. Now, as part of my PhD, I focus on scheduling time-triggered networks in two different directions. Large-scale networks and how to cope with the increasing complexity to synthesize its schedules. Developing protocols for online scheduling reconfiguration in cases of components failures or hot insertions.